MP3/WMA Digital Audio Player Controller

SM341 |
 Overview
SM341 is a high-performance and cost-competitive solution for MP3/WMA decoder ICs with USB2.0 HS/USB 1.1 Host device controller functions. It integrates a high-quality 16-bit Codec and 2 DC/DC converters. The WM DRM (v.10) is also supported by this SoC. It includes an audio decoder with a high performance DSP, ADPCM record capabilities and a high-speed USB2.0 HS/USB1.1 Host interface for downloading music and uploading voice recordings. For stored and playback music files, the SM341 also provides current major Flash media interfaces like SD/MMC to NAND Flash memory.
The chip also provides interfaces to FM module, color LCDs, buttons and switch inputs. The SM341’s programmable architecture supports MP1, MP2, MP3, and WMA digital audio standards.
The SM341 has an efficient DSP that enables very low power consumption with long battery life configurations including 1xAA, 1xAAA and rechargeable Li-Ion batteries. In addition, the single-chip design and low pin count enables very small digital audio devices. The SM341 is available in 128-pin QFP package.
Features
The SM341 is a single chip low-power solution for high performance digital audio with Flash Media Card interfaces. This standalone system on chip (SoC), has the following key features:
- Complies with High Speed USB specification ver.2.0
- USB Host Mass Storage Class specification ver.1.1
- Build in high performance DSP, it performs
- Decode MP3 and WMA audio formats in real time
- Complete system solution for interfacing devices to USB2.0
- Secure Digital™ / Multi Media Card™ (SD/MMC),
- On-board NAND type or MLC Flash memory
- A build in 8051 micro-controller to provide house keeping and control functions in system level
- 6-mode equalizer (Normal, Jazz, Rock, Classic, Pop, Bass)
- Supports FM radio input and control interface
- Provides LCM module (8088,68xx, serial I/O)
- Supports FAT16 / FAT32 file system format
- Integrated 16-bit high-quality stereo CODEC
- Operates with clock 12 MHz and internal PLL circuit
- Energy saving power management
- Flexible software upgrade for future decoding algorithm via USB interface
- It is fabricated using a 0.18 CMOS process
- Operate on a single power supply (Vdd = 3.3V).
- Available in 128-pin QFP package
- Supports ID3 format display
SM341 Block Diagram
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